DMACONThe DMA control register lets you read and set a bit mask that disables or enables DMA channels in the Amiga.
|15||SET/CLR||0=clear, 1=set bits that are set to 1 below|
|14||BBUSY||Blitter busy status bit (read only)|
|13||BZERO||Blitter logic zero status bit. (read only)|
|10||BLTPRI||Blitter priority, 0=give every 4th cycle to CPU|
|09||DMAEN||Enable all DMA below|
|08||BPLEN||Bit plane DMA|
|03||AUD3EN||Audio channel 3 DMA|
|02||AUD2EN||Audio channel 2 DMA|
|01||AUD1EN||Audio channel 1 DMA|
|00||AUD0EN||Audio channel 0 DMA|
These channels access the chip memory interleaved with the CPU, so that they do work in the background to off-load the CPU.
Sometimes, they require more than every other bus cycle - in which case they delay the CPU's memory accesses. DMA always has priority over the CPU, and so it's good if you set only the channels you use.
Normally though, you will always want to have the same old channels enabled and DMA activity on the bus is actually initiated by writing to other registers, so you can safely set the bog standard DMA mask every time:
Disabling spritesBecause of the way sprites can be chained together, turning their own DMA fetching on and off, writing #$0020 to DMACON must be done just after the last line of a frame, or you will get sprite garbage rolling down the screen. This is important to double-check, since you might be lucky enough to not get the sprite garbage on some Amiga models at the time of testing.
You can also point all sprite pointers to a blank sprite.
BlankSprite: dc.l $20002100,0,0
Waiting for the blitterYou must always wait for the blitter to finish before writing new values to set it up for the next blit. (The only exception to this is when the instructions to write the new values is known to not occur until the blitter has finished. This happens when those instructions are in chip memory and BLTPRI=1 and the blit uses all cycle slots (BLTCON0=$x9xx, $xfxx)).
A correct blit wait, compatible with all Amigas:
tst.w $dff002 ;required for code running in fastram on the first A1000 models .wait: btst #6,$dff002 bne.s .wait ;--- set up the next blit here ---